Author |
Message |
mike page
Joined: Sep 26, 2016 Posts: 134 Location: norwich, uk
|
Posted: Mon May 21, 2018 4:10 am Post subject:
4046 tracking / multiplying limits |
|
|
Hello there, anyone know if the 4046 can multiply clock rate pulses? Or does it only work with audio rate?
Cheers! |
|
Back to top
|
|
|
Steveg
Joined: Apr 23, 2015 Posts: 182 Location: Perth, Australia
|
Posted: Mon May 21, 2018 6:35 am Post subject:
|
|
|
The data sheet says the 4046 VCO can go up to 1.4MHz. So that is the limit. Also if you want to use the clock for comms it might have too much jitter. |
|
Back to top
|
|
|
JovianPyx
Joined: Nov 20, 2007 Posts: 1988 Location: West Red Spot, Jupiter
Audio files: 224
|
Posted: Mon May 21, 2018 6:56 am Post subject:
|
|
|
If the MHz need is beyond what the CD4046 can do, the 74HC4046 works up to an input frequency of 17 MHz, but doing clock multiplication this way is a dubious technique. 74HC4046 has a power input limit of 5 volts. As SteveG said, the jitter may make it useless.
Jitter can cause short (or long) clocks. The short ones could cause partial execution of instructions which may look like intermittent failure, wrong answers for computations or just plain crashing. It isn't worth the hassle of troubleshooting IMO.
For any external clock to a digital device it is best to use the exact clock circuit described in it's data sheet. It's usually just a crystal and a couple of caps.
I know that today's microprocessors often use an internal PLL to multiply it's clock, but I've no idea what exact circuit is used for the PLL (which might in fact be a DLL) and there's no external capacitor for those.
But, YMMV, so if this is truly necessary, try it and then let us know how it worked. _________________ FPGA, dsPIC and Fatman Synth Stuff
Time flies like a banana. Fruit flies when you're having fun. BTW, Do these genes make my ass look fat? corruptio optimi pessima
|
|
Back to top
|
|
|
Skrog Productions
Joined: Jan 07, 2009 Posts: 1196 Location: Scottish Borders
Audio files: 155
|
Posted: Mon May 21, 2018 9:01 am Post subject:
|
|
|
Hi , a long time ago i once tried a 4046 to increase the rate (double) of one of my mfos sequencers clock out , it didn't work at the 2 or 3 hz approx. speeds of my modular sequencer clocks .
Dave |
|
Back to top
|
|
|
JovianPyx
Joined: Nov 20, 2007 Posts: 1988 Location: West Red Spot, Jupiter
Audio files: 224
|
Posted: Mon May 21, 2018 9:06 am Post subject:
|
|
|
Yeah, that can happen if the 4046 cap is too small which could be resolved with a "range switch" that changes the cap value. The 4046 is capable of working at any rate below it's maximum with the correct size capacitor - even at cycle times measured in days. _________________ FPGA, dsPIC and Fatman Synth Stuff
Time flies like a banana. Fruit flies when you're having fun. BTW, Do these genes make my ass look fat? corruptio optimi pessima
|
|
Back to top
|
|
|
Skrog Productions
Joined: Jan 07, 2009 Posts: 1196 Location: Scottish Borders
Audio files: 155
|
Posted: Mon May 21, 2018 9:09 am Post subject:
|
|
|
ahh , thanks Scott |
|
Back to top
|
|
|
mike page
Joined: Sep 26, 2016 Posts: 134 Location: norwich, uk
|
Posted: Mon May 21, 2018 10:21 am Post subject:
|
|
|
JovianPyx wrote: | Yeah, that can happen if the 4046 cap is too small which could be resolved with a "range switch" that changes the cap value. The 4046 is capable of working at any rate below it's maximum with the correct size capacitor - even at cycle times measured in days. |
Thats good to know!
here is the concept, its quite simpified, I hope it makes sense
to add a 4052 to select the multiplication amount would be cool |
|
Back to top
|
|
|
piedwagtail
Joined: Apr 15, 2006 Posts: 297 Location: shoreditch
Audio files: 3
|
Posted: Sun May 27, 2018 9:38 am Post subject:
|
|
|
There was the EMM Harmony generator see muffs - Harmonic Engine PCB - circuitbenders.co.uk.
The issue surely is the delay of change; whether it bothers you or not.
I thought about a 4522 for that harmonic engine with a DAC instead of the 4066 bashing.
Any design would definitely be a good empirical study at clock and audio with a lot of space for new ideas.
R |
|
Back to top
|
|
|
Steveg
Joined: Apr 23, 2015 Posts: 182 Location: Perth, Australia
|
Posted: Mon May 28, 2018 2:41 am Post subject:
|
|
|
For the slide pots, can i suggest connecting the top of each pot to VCC, the bottom to ground and each wiper to the 4051. Then connect the 4051 common to the output op amp. Add a small cap if the 4051 switching causes noise or a larger one if you want more glide. |
|
Back to top
|
|
|
CHRISKELLY
Joined: Apr 08, 2018 Posts: 103 Location: England
Audio files: 3
|
Posted: Fri Aug 17, 2018 6:59 am Post subject:
|
|
|
Does anyone know the lower frequency limits possible with a 4046?
I've painted myself into a corner by dividing down a 555 timer to make my main clock speed (so that some features use 2x clock speed) and now i'll struggle to externally clock everything
Has anyone doubled clock frequency by splitting the signal and delaying one, then sending both into an XOR? |
|
Back to top
|
|
|
JovianPyx
Joined: Nov 20, 2007 Posts: 1988 Location: West Red Spot, Jupiter
Audio files: 224
|
Posted: Fri Aug 17, 2018 8:22 am Post subject:
|
|
|
Can you tell us what frequency you need?
The 4046 timing capacitor sets the range of frequencies attainable with a 4046, where larger caps give lower frequency. The 4046 being CMOS touches the cap with very high impedance inputs, so there is very low leakage and as such very low frequencies should be attainable, possibly even down to days per cycle.
While the XOR technique you describe can work, it isn't easy to make it variable. A better method is to use some kind of oscillator (such as a 4046 or 7555) to drive a binary counter. The oscillator itself could be seen as the "double frequency" output while the output of the counter's first stage would be the "normal frequency". Doing it this way, the double frequency output will always track perfectly against the oscillator and the oscillator frequency can be varied if needed without perturbation of the the two outputs, the one will always be exactly twice the frequency of the other. _________________ FPGA, dsPIC and Fatman Synth Stuff
Time flies like a banana. Fruit flies when you're having fun. BTW, Do these genes make my ass look fat? corruptio optimi pessima
|
|
Back to top
|
|
|
CHRISKELLY
Joined: Apr 08, 2018 Posts: 103 Location: England
Audio files: 3
|
Posted: Fri Aug 17, 2018 8:53 am Post subject:
|
|
|
Ideally I'd like to take an external bpm (from say a Korg Volca) around 120bpm / 2hz and double this using a 4046 to 4hz. |
|
Back to top
|
|
|
CHRISKELLY
Joined: Apr 08, 2018 Posts: 103 Location: England
Audio files: 3
|
|
Back to top
|
|
|
JovianPyx
Joined: Nov 20, 2007 Posts: 1988 Location: West Red Spot, Jupiter
Audio files: 224
|
Posted: Fri Aug 17, 2018 9:18 am Post subject:
|
|
|
CHRISKELLY wrote: | Ideally I'd like to take an external bpm (from say a Korg Volca) around 120bpm / 2hz and double this using a 4046 to 4hz. |
You can do this with a 4046 and a flip-flop in the loop, however, when the tempo clock changes, there may be variations in the 4046 output until it stabilizes and locks. If the tempo clock remains the same throughout it's use, it should work.
The timing cap is on pins 6 and 7.
With a PLL, you want the cap you select to allow frequencies both above and below the target, otherwise you cripple the ability of the 4046 to lock. _________________ FPGA, dsPIC and Fatman Synth Stuff
Time flies like a banana. Fruit flies when you're having fun. BTW, Do these genes make my ass look fat? corruptio optimi pessima
|
|
Back to top
|
|
|
CHRISKELLY
Joined: Apr 08, 2018 Posts: 103 Location: England
Audio files: 3
|
Posted: Fri Aug 17, 2018 9:23 am Post subject:
|
|
|
NVM i think i figured it out:
Based on the graph, for R1 = 1M and C1 = > 0.2u i should be able to get to 4hz
Sorry for the forum spamming! |
|
Back to top
|
|
|
CHRISKELLY
Joined: Apr 08, 2018 Posts: 103 Location: England
Audio files: 3
|
Posted: Fri Aug 17, 2018 9:25 am Post subject:
|
|
|
Just seen your post Jovian!
Thanks for the info - I'll find a good range of resistors for pin 11 and pin 12 then to maximise the range I can lock onto.
I assume this is all done via comparator 2? I was going to use the LPF using 10k's too as per your Fatman Synth harmonic guide |
|
Back to top
|
|
|
JovianPyx
Joined: Nov 20, 2007 Posts: 1988 Location: West Red Spot, Jupiter
Audio files: 224
|
Posted: Fri Aug 17, 2018 9:56 am Post subject:
|
|
|
Phase Comparator II has the widest lock range and also maintains a zero degree phase shift with the input signal, so it is your best bet. It also resists locking to anything but the fundamental (phase comp I can lock to octaves or 5ths of the fundamental under certain conditions). _________________ FPGA, dsPIC and Fatman Synth Stuff
Time flies like a banana. Fruit flies when you're having fun. BTW, Do these genes make my ass look fat? corruptio optimi pessima
|
|
Back to top
|
|
|
|