what does a wav file data sample value mean?

[urbanscallywag]

Thanks for the clips, they do sound good. I meant that I had to take a look at why SVF requires such a high sample rate, its odd.

And FPGA is the (only) way to go.

[JovianPyx]

The "why" is an excellent question which I admit I didn't research and probably should - just to understand the process better. In fact, someone else on another forum pointed out that other filters (recursive) also have the same constraint. His particular point was aimed at a design he is developing for an FPGA synth using a 4 pole filter. I asked him if that design would avoid the 1/6 SR limit and he said it would not and his system needed to obey it.

So I merely looked at the SVF research conclusion and designed within those constraints.

My guess is that higher frequency components can cause larger jumps in value from one sample to the next. The larger numbers become a problem, but I need to read more to find out exactly why. Higher sample rates given the same input data will cause the difference in value from one sample to the next to be smaller.

And yes, an FPGA is quite a nice thing for DSP, and even big ones don't cost that much. That bad part is the the big ones are in BGA packages and I prefer not to have to solder those, so thus far, I've used development boards as the basis for synth design. In fact, without those reasonably priced dev boards, I wouldn't be writing in this forum...

[urbanscallywag]

...even the big ones don't cost much? You obviously have a different budget than me, $10k/part is not doable for me.

Recursive filters don't work well with cutoff frequencies less than fs/8 or so. I thought about them vs state-variable filters once and I came to the conclusion they didn't have the same shortcoming. I will ponder it today and explain why.

[JovianPyx]

[urbanscallywag]

Both Altera and Xilinx sell FPGA that cost over $10,000. Stratix III and IV GX by Altera and Virtex 5 by Xilinx come to mind. For synthesizers 2M gate device is pretty ample, though I think multipliers and memory are better measures of performance in this area.

OK you're right a SVF is recursive in that it depends on past outputs. When I've been talking about recursive I am not including SVF because its a special case...well I am not quite sure what's going on with it.

So you've shown that SVF vs other IIR do not have the same problems. I believe most LPF IIR are the least stable when the fc is less than fs/8 or so. The SVF is the least stable when fc is greater than fs/6. Seems like there are different limitations. I understand the problem with most IIR, just not SVF.

[urbanscallywag]

Stratix III
http://search.digikey.com/scripts/DkSearch/dksus.dll?Detail&name=544-2534-ND

Virtex 5
http://search.digikey.com/scripts/DkSearch/dksus.dll?Detail&name=XC5VLX330-2FFG1760C-ND

[JovianPyx]

Oh yeah, Virtex. But as you point out, the size of something like a Spartan is more than enough for a music synthesizer. So I go for the cheap stuff.

I've got one board with a Spartan-3A DSP 1800. It's got 1800K gates with 84 multipliers and/or 84 block RAMs. I'm not sure what the FPGA cost, but I got the dev board for $295, which I considered worth the price considering what is on the board.

[urbanscallywag]

Seems like that FPGA is about $50, but a pain to work with (if you were to build boards).

[JovianPyx]

Yes, BGA is a serious pain. If it weren't for inexpesive dev boards (I've got 7), I couldn't do this, at least not with FPGAs. I looked into DSP dev boards, higher end ones are still very expensive and the lower end ones that are affordable didn't seem to stack up against an FPGA when parallelism is considered vs raw high clock rate - for the price of the board. And it is probably true that both DSP and FPGA mfrs subsidise their dev boards. The boards are not horribly crippled, most have at least 30 I/O pins that are available for use for external signals, some have over 100 such pins. The only thing I'd like to change is the use of DDR SDRAM on most of them, I'd prefer SRAM because DDR SDRAM timing can be a real PITA.

[urbanscallywag]

Have you tried the DDR core on opencores.org? Its almost a shame to waste SRAM on audio.

I guess I've done worse, making a 1 second stereo delay with block RAM.

[JovianPyx]

Well, it wouldn't be audio, as in sample storage - for that, I agree that SDRAM is better, if for no other reason than sheer size. SRAM just isn't that big. But there are other uses for SRAM which could be a sort of single port alternative for block RAM to extend an FPGA that is light on block RAM resources.

As far as opencores goes, it's great stuff, but using a core doesn't help me understand the lower level function. I don't do this for commercial stuff at this time, this is self education for me. I'm on the FPGA-synth list, where one member designed a simple record/playback sampler thing using DDR SDRAM. All it does is record an analog signal and can be made to play it back by pushing a button on the dev board. I need to study his code and see what makes it tick (while at the same time referring to the RAM's data sheet). Funny thing is, once I understand how it works, I would probably opt for opencores et al.

---

As for your comment about recursive filters performing poorly with low Fc, I remember reading about and manipulating the config math for a Chebyshev. It appears from the example tables of coefficients, that a Chebyshev works best with Fc being 1/4 SR (1/2 nyquist). The farther away from 1/4 SR one tries to go, the more likely the filter becomes unstable. In that particular project, I finally replaced the Chebyshev idea with an FIR filter which worked much much better.

So not all recursive filters have this characteristic. I've also used simple IIR filters (single stage, and it's also recursive) for emulating what an RC circuit does. I've operated them at VERY low Fc (think portamento) and they work very well. Low Fc means a wider word size though, but for an FPGA this is trivial.

It's quite apparent that certain filters are better for certain tasks. I picked SVF for musical use because it is simple, fast and easy to tune (a single number controls Fc) and Q and Fc don't affect each other. It would not be the best filter for other uses, however, such as an oversampled system with a brickwall filter to attenuate harmonics that would produce audible aliased artifacts. And of course, the drawback of an SVF is the requiremnent to use a higher sample rate. But I've not had a problem with that, I've been able to get one shared 8 ways between each of 8 voices in a polysynth.

[urbanscallywag]

I understand your desire to learn rather than just use. The problem is that FPGA have become so complicated that you really have to choose what portions you want to be an expert in and what you'll...accept as fact. For example I've used many C compilers but I don't intend to write one (unless I need to). I've learned calculus but I don't want to derive it all. There are just too many things to learn in one life time!

You're right, the filter coefficient quantization is best at fs/4. I think the reason that low bandwidth IIR are a bigger problem because the processing gain is higher, so the finite precision hurts more than near fs/2. Still doesn't explain why a SVF works well below fs/8.

[urbanscallywag]

Though I do think you usually have to have some idea of what the core is doing so you can interface to it and test it, etc.

[JovianPyx]

[JovianPyx]

[urbanscallywag]

The limitation is not a hard rule, its something to take into consideration when doing a design.

I think the reason you didn't see it in an RC emulation is that a single order system doesn't have stability problems because of the limited gain.

[urbanscallywag]

I see Magnus's explanation involving Tustin's transform. That's probably a step in the right direction, but other IIR using Tustin's transform (Butterworth, Chebychev, Elliptic) still don't have the same problem as SVF (as far as I know).

[JovianPyx]

I'm thinking that it may have something to do with what the signal frequency is with respect to the Fc. If the Fc is very low compared to the processed signal frequency, there is heavy attenuation which makes the output numbers very small. This can be mitigated with wider data words, unless that's not possible.

[JovianPyx]

[urbanscallywag]

I don't have anything against SVF I am just interested in why it doesn't behave like other recursive filters.

[JovianPyx]