electro-music.com   Dedicated to experimental electro-acoustic
and electronic music
 
    Front Page  |  Radio
 |  Media  |  Forum  |  Wiki  |  Links
Forum with support of Syndicator RSS
 FAQFAQ   CalendarCalendar   SearchSearch   MemberlistMemberlist   UsergroupsUsergroups   LinksLinks
 RegisterRegister   ProfileProfile   Log in to check your private messagesLog in to check your private messages   Log inLog in  Chat RoomChat Room 
 Forum index » DIY Hardware and Software » Microcontrollers and Programmable Logic
SPI interfacing... is it supposed to be painful?
Post new topic   Reply to topic Moderators: State Machine
Page 1 of 1 [20 Posts]
View unread posts
View new posts in the last week
Mark the topic unread :: View previous topic :: View next topic
Author Message
skrasms



Joined: Feb 21, 2008
Posts: 121
Location: Portland, OR

PostPosted: Mon Jan 05, 2009 8:00 pm    Post subject: SPI interfacing... is it supposed to be painful?
Subject description: I thought it was a standard
Reply with quote  Mark this post and the followings unread

I've used UART for MIDI with no problems. Now I want to try a SPI A/D converter. Every SPI chip I've looked at has completely different timing requirements. Some transmit zeros until the nth bit in a sequence, some need shifted clocks, some use rising edges and some use falling edges.

The SPI peripherals in the microcontrollers I've seen can compensate for rising vs. falling edges and clock phase, but not the data offsets. Is it normal to have to code a driver just to handle SPI transfers for every SPI device you use? I'm not even talking about initialization routines, just getting bits back and forth. It looks like I will have to do so much manually that it is barely worth using a peripheral.

Is there a trick somewhere that I am overlooking?

_________________
Software and Hardware Design
Back to top
View user's profile Send private message
urbanscallywag



Joined: Nov 30, 2007
Posts: 317
Location: sometimes

PostPosted: Mon Jan 05, 2009 8:47 pm    Post subject: Reply with quote  Mark this post and the followings unread

What microcontroller are you using? Its been awhile since I've done any uC stuff, but this shouldn't be that hard.

As you discovered there should be a clock polarity control and a clock phase control. Between the two you should be able to anything that is SPI compatible.

I would start with an app note from the uC vendor, the should have worked out all the details for you. Smile
Back to top
View user's profile Send private message
skrasms



Joined: Feb 21, 2008
Posts: 121
Location: Portland, OR

PostPosted: Mon Jan 05, 2009 9:51 pm    Post subject: Reply with quote  Mark this post and the followings unread

urbanscallywag wrote:
What microcontroller are you using? Its been awhile since I've done any uC stuff, but this shouldn't be that hard.

As you discovered there should be a clock polarity control and a clock phase control. Between the two you should be able to anything that is SPI compatible.

I would start with an app note from the uC vendor, the should have worked out all the details for you. :)


There are four main things that seem to be required for SPI:
1) Clock Phase Control
2) Clock Polarity Control
3) Chip Select
4) Data Decoding (since it never seems to start on the first clock cycle of any cluster)

#3 is the biggest problem for me right now. With a uP in SPI master mode it is always clocking continuously. As soon as that chip select goes active then data starts transferring with or without intention. The dsPIC chips I have a development board for all put their peripheral chip select pin right inside the only register that can be used to write 8 pins in a single instruction. I need that register dedicated to another interface, so I have to make my own SS# signal on a different pin. Then to make sure it's synchronized with the SPI clock I need to add another pin that has interrupts triggered by the free-running SPI clock. In total I'm ending up with something like 8 dedicated pins to interface an SPI A/D converter.

I find that extremely haphazard, myself, and haven't been able to make it work yet.

Edit: I'm using a dsPIC30F4013, by the way. I haven't seen any DIP chips in the family that don't have the same SS# pin location problem.

_________________
Software and Hardware Design
Back to top
View user's profile Send private message
urbanscallywag



Joined: Nov 30, 2007
Posts: 317
Location: sometimes

PostPosted: Mon Jan 05, 2009 10:01 pm    Post subject: Reply with quote  Mark this post and the followings unread

In that case does indeed sound like a headache. Sad

Do they have I2C A/D that meet your needs? Or maybe I2C to another uC as a SPI bridge?
Back to top
View user's profile Send private message
skrasms



Joined: Feb 21, 2008
Posts: 121
Location: Portland, OR

PostPosted: Mon Jan 05, 2009 11:08 pm    Post subject: Reply with quote  Mark this post and the followings unread

Okay, so putting aside all the SS# pin conflict business...

For the moment I am trying to get the SPI peripheral to control an A/D at all. I am not using any other peripherals, but am still not having luck. The A/D I am using is a TLC3548. It looks really straightforward from the data sheet, but I am not getting the dsPIC SPI peripheral to actually control it.

The datasheet for the TLC3548 shows that the chip select signal should be high between writes. The SPI peripheral in the dsPIC doesn't seem able to generate an active low chip select signal. It can generate a sync pulse, but that is not the same. Does it not matter?

_________________
Software and Hardware Design
Back to top
View user's profile Send private message
blue hell
Site Admin


Joined: Apr 03, 2004
Posts: 24468
Location: The Netherlands, Enschede
Audio files: 297
G2 patch files: 320

PostPosted: Tue Jan 06, 2009 6:02 am    Post subject: Reply with quote  Mark this post and the followings unread

I'm not really an expert here, but I have used SPI on a PIC 18 and I happen to have the pic24/30/33 ref manuals at hand, so here are my two cents.

From the data sheet (family reference manual (39699b chapter 23)) :

Quote:
Note that the SCKx signal clock is not free running for normal SPI modes. It will only run for 8 or 16 pulses when the SPIxBUF is loaded with data. It will, however, be continuous for Framed modes.


Is there a special reason for you to run the interface in framed mode?

Anyway, in framed mode the SSx pin is a Frame sync signal, and not a chip select. Your peripheral will have to support the framed mode as well in that case and it's Chip Enable should be always active then and the frame sync is used to find the start of an 8 or 16 bit (configurable) data packet.

In non framed master mode SSx is a slave select signal, when you set the device into 3 pin mode SSx will not be used and it's free for you to use for your own purposes. (I'm not sure what it does in 4 wire mode ... it's not mentioned in the description of the unframed master mode operation (it is a chip select input in slave mode)). When you need a CS for a slave you can (and have to) pick any pin you see fit and it must be setup before performing the first data exchange ... after that you can just leave it active, or toggle it as you see fit.

Apart from that I've always found it easier to to implement SPI like interfaces (and I2C too) with bit banging driven from a state machine in a timer interrupt (as all the options on the hardware interface drive me nuts) ... but when you need a high speed interface that's not really a bright idea maybe Wink

_________________
Jan
also .. could someone please turn down the thermostat a bit.
Posted Image, might have been reduced in size. Click Image to view fullscreen.
Back to top
View user's profile Send private message Visit poster's website
skrasms



Joined: Feb 21, 2008
Posts: 121
Location: Portland, OR

PostPosted: Tue Jan 06, 2009 9:43 am    Post subject: Reply with quote  Mark this post and the followings unread

I could not get the free running SPI clock to stop between data even when I thought I disabled framed mode. I am sure that I am not setting something up correctly. Frame mode is not specifically important to me, just that I have some way to keep the dsPIC and TLC synchronized. The TLC supports framed modes or chip select to control it.

When SSx is a slave select signal does that mean it's an input to make the dsPIC a slave, or it's an output to enable a slave?

Sorry I have to run to work right now. I'll have more details later.

_________________
Software and Hardware Design
Back to top
View user's profile Send private message
urbanscallywag



Joined: Nov 30, 2007
Posts: 317
Location: sometimes

PostPosted: Tue Jan 06, 2009 8:57 pm    Post subject: Reply with quote  Mark this post and the followings unread

Blue Hell, I'm with you on bit banging state machines, but at that point I'd rather be using VHDL than assembly. Wink
Back to top
View user's profile Send private message
skrasms



Joined: Feb 21, 2008
Posts: 121
Location: Portland, OR

PostPosted: Tue Jan 06, 2009 10:23 pm    Post subject: Reply with quote  Mark this post and the followings unread

If I could handle the slow speed I'd do bit banging in a heart beat. It's so much easier...

I went back through and made absolutely sure everything related to framed mode was disabled. The clock is no longer free running, so that is progress!

I'm not getting any data back from the A/D converter even in test mode, but I can still mess with the clock polarity/phase options.

_________________
Software and Hardware Design
Back to top
View user's profile Send private message
skrasms



Joined: Feb 21, 2008
Posts: 121
Location: Portland, OR

PostPosted: Tue Jan 06, 2009 11:14 pm    Post subject: Reply with quote  Mark this post and the followings unread

Darn, no intelligible data for any combination of clock settings. I wish there was an easy way to tell if the problem is in my SPI interface or in the commands I'm sending to the A/D.

The A/D is a TLC3548, by the way.

_________________
Software and Hardware Design
Back to top
View user's profile Send private message
blue hell
Site Admin


Joined: Apr 03, 2004
Posts: 24468
Location: The Netherlands, Enschede
Audio files: 297
G2 patch files: 320

PostPosted: Wed Jan 07, 2009 7:04 am    Post subject: Reply with quote  Mark this post and the followings unread

I remember it to be quite a puzzle to get clocks & data OK for the spi flash devices I've used ... and then the bit order and then the commands & addresses ... a scope with a freezable screen is always helpful for this, if you have one ... are you getting any response at all from your device (or just ones or zeros) ? an issue with 8 vs 16 data bits maybe?

But whatever you do, don't give up, it /will/ work eventually!

_________________
Jan
also .. could someone please turn down the thermostat a bit.
Posted Image, might have been reduced in size. Click Image to view fullscreen.
Back to top
View user's profile Send private message Visit poster's website
skrasms



Joined: Feb 21, 2008
Posts: 121
Location: Portland, OR

PostPosted: Wed Jan 07, 2009 9:23 pm    Post subject: Reply with quote  Mark this post and the followings unread

I won't give up! Being around helpful people keeps me motivated, also.

I have a scope, but it's very old with no freeze functions. It shows that my clock is running in 16-bit spurts, which is a good sign. The oscilloscope shows that *something* is coming out of the A/D over SPI, but it is not a healthy logic signal. It is only about half a volt peak to peak. It also does not change no matter what command I send. It actually looks a lot like the chip select signal. It also picks up noise from my hand.

You mention bit order... do I need to reverse the order of the bits before I send them? It looks like according to the data sheets everything is shifting MSB first so I'm alright.

_________________
Software and Hardware Design
Back to top
View user's profile Send private message
blue hell
Site Admin


Joined: Apr 03, 2004
Posts: 24468
Location: The Netherlands, Enschede
Audio files: 297
G2 patch files: 320

PostPosted: Thu Jan 08, 2009 2:04 pm    Post subject: Reply with quote  Mark this post and the followings unread

Looks like the line is hi-z then, is CS ok? It should always send hard bits I think when CS is active.

Bit reversal is more an issue for an all software implementation, it should be auto-ok here.

_________________
Jan
also .. could someone please turn down the thermostat a bit.
Posted Image, might have been reduced in size. Click Image to view fullscreen.
Back to top
View user's profile Send private message Visit poster's website
skrasms



Joined: Feb 21, 2008
Posts: 121
Location: Portland, OR

PostPosted: Sun Feb 01, 2009 2:36 pm    Post subject: Reply with quote  Mark this post and the followings unread

I found one problem. The datasheet did not mention it that I could see, but the application notes I found say the TLC3548 has to receive a "A000h" command after it is first powered up to start running.

I put that in my code, and now I am seeing hard bits coming out the TLCs SDO pin. The microcontroller is not recognizing them as data, though. It always reads the SPI RX buffer as being 0.

I'm starting to feel like a USB logic analyzer would be a worthwhile purchase for this kind of stuff.

_________________
Software and Hardware Design
Back to top
View user's profile Send private message
blue hell
Site Admin


Joined: Apr 03, 2004
Posts: 24468
Location: The Netherlands, Enschede
Audio files: 297
G2 patch files: 320

PostPosted: Sun Feb 01, 2009 3:23 pm    Post subject: Reply with quote  Mark this post and the followings unread

Is any of the following happening?

Quote:
4. When the transfer is complete, the following events will occur:
• The interrupt flag bit, SPIxIF, is set. SPIx interrupts can be enabled by setting the
interrupt enable bit, SPIxIE. The SPIxIF flag is not cleared automatically by the
hardware.
• Also, when the ongoing transmit and receive operation is completed, the contents of
the SPIxSR are moved to the SPIxRXB register.
• The SPIxRBF (SPIxSTAT<0>) bit is set by the module, indicating that the receive
buffer is full. Once the SPIxBUF register is read by the user code, the hardware clears
the SPIxRBF bit.


are there any overflows?

Quote:
5. If the SPIxRBF bit is set (receive buffer is full) when the SPIx module needs to transfer
data from SPIxSR to SPIxRXB, the module will set the SPIROV (SPIxSTAT<6>) bit,
indicating an overflow condition.


I can't find the details quickly but I do know that micro chip pic18 UARTS stop receiving data when an overflow condition was detected, the situation should be cleared first then.

And then Microchip devices have issues at times with pins used for peripherals when those pins are mapped onto general purpose I/O as well; sometimes the general purpose function must explicitly be set to reflect the special purpose signal direction. At other times when a pin can be set as an analog input that function has to be disabled explicitly, otherwise that function will "win" the pin function arbitration ... it's a bit messy and inconsistent really.

_________________
Jan
also .. could someone please turn down the thermostat a bit.
Posted Image, might have been reduced in size. Click Image to view fullscreen.
Back to top
View user's profile Send private message Visit poster's website
skrasms



Joined: Feb 21, 2008
Posts: 121
Location: Portland, OR

PostPosted: Fri Mar 06, 2009 11:19 pm    Post subject: Reply with quote  Mark this post and the followings unread

I finally broke down and bought a USB logic analyzer for stuff like this.

There is data coming back from the chip now (and the microcontroller sees it), but it doesn't make much sense. No matter what command I send to the A/D, I either get 0x4003 or 0xE7E1 coming out of it. Whether it is one or the other is randomly chosen by the chip at power-up.

That is, it will either power up and continuously respond 0x4003 to everything, or power up and continuously respond 0xE7E1 to everything.
0xE7E1 is 14840 after decoding, which is somewhat close to 16384 (that is, 2^14). 0x4003 is 4096 after decoding. That's 2^12.

I don't get it.

_________________
Software and Hardware Design
Back to top
View user's profile Send private message
skrasms



Joined: Feb 21, 2008
Posts: 121
Location: Portland, OR

PostPosted: Tue Mar 17, 2009 7:16 pm    Post subject: Reply with quote  Mark this post and the followings unread

I am so tired of being stuck on this. At this point I would pay someone to get me a working combination of schematic + code to make the A/D run. Getting communication working is only 5% of my design, but it is taking 95% of the time.
_________________
Software and Hardware Design
Back to top
View user's profile Send private message
blue hell
Site Admin


Joined: Apr 03, 2004
Posts: 24468
Location: The Netherlands, Enschede
Audio files: 297
G2 patch files: 320

PostPosted: Tue Mar 17, 2009 7:27 pm    Post subject: Reply with quote  Mark this post and the followings unread

What can i say ... communications between devices is one of the hardest parts to get right. I went through the converter's data sheets again a couple of days ago but didn't see any cotchas jump out ... then I looked at the application notes and thought you might not have seen those, but you mentioned 'm ... so I can't be of much help, someone having actually used the converter might know.
_________________
Jan
also .. could someone please turn down the thermostat a bit.
Posted Image, might have been reduced in size. Click Image to view fullscreen.
Back to top
View user's profile Send private message Visit poster's website
skrasms



Joined: Feb 21, 2008
Posts: 121
Location: Portland, OR

PostPosted: Wed Mar 18, 2009 9:57 pm    Post subject: Reply with quote  Mark this post and the followings unread

Blue Hell wrote:
What can i say ... communications between devices is one of the hardest parts to get right. I went through the converter's data sheets again a couple of days ago but didn't see any cotchas jump out ... then I looked at the application notes and thought you might not have seen those, but you mentioned 'm ... so I can't be of much help, someone having actually used the converter might know.


It finally works!
The problem wasn't even the SPI directly... how frustrating is that?

The A/D has two sampling lengths: 12 clocks and 44 clocks. The default is 44 clocks, and what the datasheet doesn't say directly is that those clocks have to all occur in one single write cycle. The whole thing resets when CS goes high. Since I was using 16-bit SPI transfers, only 12 conversion clocks would ever happen, so the data back would always be garbage. As soon as I changed the initialization to 12 clock conversions I started seeing interrupts come back. Eventually it worked itself out.

I'm psyched. I can finally move forward again.

Thanks for encouraging me not to give up Smile

_________________
Software and Hardware Design
Back to top
View user's profile Send private message
blue hell
Site Admin


Joined: Apr 03, 2004
Posts: 24468
Location: The Netherlands, Enschede
Audio files: 297
G2 patch files: 320

PostPosted: Thu Mar 19, 2009 6:13 am    Post subject: Reply with quote  Mark this post and the followings unread

Good work to not give up thumright
_________________
Jan
also .. could someone please turn down the thermostat a bit.
Posted Image, might have been reduced in size. Click Image to view fullscreen.
Back to top
View user's profile Send private message Visit poster's website
Display posts from previous:   
Post new topic   Reply to topic Moderators: State Machine
Page 1 of 1 [20 Posts]
View unread posts
View new posts in the last week
Mark the topic unread :: View previous topic :: View next topic
 Forum index » DIY Hardware and Software » Microcontrollers and Programmable Logic
Jump to:  

You cannot post new topics in this forum
You cannot reply to topics in this forum
You cannot edit your posts in this forum
You cannot delete your posts in this forum
You cannot vote in polls in this forum
You cannot attach files in this forum
You can download files in this forum


Forum with support of Syndicator RSS
Powered by phpBB © 2001, 2005 phpBB Group
Copyright © 2003 through 2009 by electro-music.com - Conditions Of Use