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 Forum index » DIY Hardware and Software » Microcontrollers and Programmable Logic
Chameleon 16-bit Development Kit
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State Machine
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PostPosted: Thu Aug 05, 2010 7:49 am    Post subject: Chameleon 16-bit Development Kit
Subject description: Somthing of interest to most of you here .....
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Here is a nice development board if you want to develop anything with video and sound on the cheap and inside a small space.

http://www.microchip.com/stellent/idcplg?IdcService=SS_GET_PAGE&nodeId=1406&dDocName=en547558

Summary:

The ChameleonTM 16-Bit Development Kit from Nurve Networks is the evolution of the high performance, small footprint, application development board. This credit card sized computer includes (2) processors, (9) processing cores, 1 MByte of on board FLASH, 64K of EEPROM, and over 200 MIPS of processing power!

Bill
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wooster



Joined: Jul 25, 2007
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PostPosted: Sat Aug 07, 2010 9:37 am    Post subject: Reply with quote  Mark this post and the followings unread

A video synth synchronized with the music could be cool...

How hard is it to synchronize code running on the different cores?

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BobTheDog



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PostPosted: Sat Aug 07, 2010 11:49 am    Post subject: Reply with quote  Mark this post and the followings unread

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There are eight lock bits (also known as semaphores) available to facilitate exclusive access to user-defined resources among multiple cogs. If a block of memory is to be used by two or more cogs at once and that block consists of more than one long (four bytes), the cogs will each have to perform multiple reads and writes to retrieve or update that memory block. This leads to the likely possibility of read/write contention on that memory block where one cog may be writing while another is reading, resulting in misreads and/or miswrites.

The locks are global bits accessed through the Hub via the Hub Instructions: LOCKNEW, LOCKRET, LOCKSET, and LOCKCLR. Because locks are accessed only through the Hub, only one cog at a time can affect them, making this an effective control mechanism. The Hub maintains an inventory of which locks are in use and their current states, and cogs can check out, return, set, and clear locks as needed during run time. See LOCKNEW, 230; LOCKRET, 233; LOCKSET, 234; and LOCKCLR, 228 for more information.


Quote:
To maintain system integrity, mutually-exclusive resources must not be accessed by more than one cog at a time. The Hub maintains this integrity by controlling access to mutually- exclusive resources, giving each cog a turn to access them in a “round robin” fashion from Cog 0 through Cog 7 and back to Cog 0 again. The Hub, and the bus it controls, runs at half the System Clock rate. This means that the Hub gives a cog access to mutually-exclusive resources once every 16 System Clock cycles. Hub instructions, the Propeller Assembly instructions that access mutually-exclusive resources, require 7 cycles to execute but they first need to be synchronized to the start of the Hub Access Window. It takes up to 15 cycles (16 minus 1, if we just missed it) to synchronize to the Hub Access Window plus 7 cycles to execute the hub instruction, so hub instructions take from 7 to 22 cycles to complete.



Quote:
The CNT register contains the current value in the global 32-bit System Counter. The System Counter serves as the central time reference for all cogs; it increments its 32-bit value once every System Clock cycle.
Upon power-up/reset, the System Counter starts with an arbitrary value and counts upwards from there, incrementing with every System Clock cycle. Since the System Counter is a read-only resource, every cog can read it simultaneously and can use the returned value to synchronize events, count cycles and measure time.



Quote:
Synchronized delays are those that are all directly related to one specific point in time, a “base” time, and serve the purpose of “time-aligning” future events relative to that point. A synchronized delay, for example, may be used to output or input a signal at a specific interval, despite the unknown amounts of overhead associated with the code itself. To understand how this is different than the Fixed Delay example, let’s look at that example’s timing diagram


http://www.parallax.com/dl/docs/prod/prop/WebPM-v1.01.pdf


This whole card looks an interesting little device, I might just order one and see.
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