Send last of 7 values based on last of 7 possible logic sigs

[speak_onion]

Ok, here's what I'm trying to do:
I have 7 possible logic events. They go high for variable amounts of time, and it's possible that more than one of them can go high at once. Each of the 7 events corresponds to a certain control value I want to send to a single input. The values are not evenly spaced. I want the last logic event to go high to send its corresponding control value, even if one ore more other logic signals are also still high.

How can I do that?

Here's what I have so far:
Each logic signal goes to the control input of a value switch with zero on the "off" input and the corresponding control value on the "on" input. The outputs of all 7 value switches are mixed with an 8-1 mixer, and the output of the mixer goes to both the clock and the input of a s/h module. That way, when one of the signals goes high (from all of them being low), the s/h module gets and samples the corresponding control value. But, it can't update until all logic signals go back low again. That is, first trigger priority instead of last trigger priority.

Any help is appreciated. Thanks!

[Antimon]

I'd say you're almost there.

A module I use pretty often is the logic pulse, which will emit a pulse of variable length when the input goes high.

You could put the pulse before the switch, and set the pulse length to just long enough so that s/h grabs it.

I think I might want to do something involving a mux though, to get it robust. My mind is in a state of chaos right now, maybe you can work it out anyway.

[speak_onion]

This is what I have so far anyway.

I'll keep experimenting.

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ButtonsToCCValues.pch2
Description:		Download (listen)
Filename:	ButtonsToCCValues.pch2
Filesize:	1.76 KB
Downloaded:	3823 Time(s)

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[iPassenger]

Haven't seen your patch as I am at work.. but if I understand correctly one of your problems is that the main sample and hold isn't sampling for each new value (the value which has essentially been created by a series of logic on or off signals).

Could you run each of the original logic signals through its own pulse module, to create a very short pulse at the on of each logic signal. Then mix these pulses together either with a mixer or perhaps a series of OR gates. Then feed this signal to the logic input of the sample hold unit that isn't working. Leave the rest of your patch the same. So now whenever any of the logic signals goes positive, a very short pulse is created and it should cause the sample and hold to take a new sample.

The only problem I can forsee is that if all logic signals are off then there will be no trigger for the sample and hold. To get round this one you could use a series of AND gates chaining together the outputs of all the logic signals. Then run the output of this through an inverter, so that the inverter signal is positive when all the other logic signals aren't. Then run that through a pulse module and into your pulse mixer (or series of OR logic gates). An alternative to using a series of AND gates might be to take the output of your control value mixer and run it through a compare to value module with the value set to the highest possible control value (e.g. all logic signals are on) and run that through an inverter pulse combo instead.

[speak_onion]

OK, I think 8 logic pulse modules mixed to another 8-1 mixer sent to the logic input of my s/h module will give me the behavior I'm looking for. I think I had some misconception of how the s/h module works.

Thanks!

[iPassenger]

Got thinking about your issue and thought this might be useful at some point:

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Value Change Logic Positive.pch2
Description:	It produces a Logic Positive signal every time the input value changes, modules in red relevant the rest are just to show it working. :)	Download (listen)
Filename:	Value Change Logic Positive.pch2
Filesize:	1.52 KB
Downloaded:	4150 Time(s)

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