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sizone
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 Posted: Wed Jun 24, 2009 10:23 pm Post subject:
Propsositional logic circuit |
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Quibbling over logic gates compelled me to throw this together. I wanted to make one while I was teaching logic last semester, but never got around to it. Also, I don't think I've ever seen a conditional gate used in a synthesizer (unless there was an "if.,then." in the old Kurzweil FUN schema).
Simply: It takes 3 cmos chips, a 4069 hex inverter, a 4071 quad 2 input "or" and a 4081 quad 2 input "and".
The ins and outs are arranged to provide basically all the propositional logic operations.
The outputs on the 4071 give disjunction, an "if p then q" conditional and an "if q then p" conditional.
The outputs on the 4081 give conjunction and material equivalence (how useful this will be to lunetta builders is questionable, but it was a neat way to set up xor)
The ouputs on the 4069 give ~p, ~q, nand, nor, and exclusive or.
There are 2 unused and gates on the 4081, one unused or gate on the 4071 and one unused inverter on the 4069. Remember to tie your unused inputs to ground (pins 1,2,5 and 6 on the 4081, pins 13 and 12 on the 4071 and pin 9 on the 4069)
http://electro-music.com/forum/phpbb-files/proplogic_141.jpg
Here's a completely useless way to use up those remaining pins:
Add a third input and hook the following in and you'll get the flippy-floppy crc bit from a Toffoli gate as the ouput of pin 4 on the 4081.
http://electro-music.com/forum/phpbb-files/toffoli_addon_741.jpg
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Uncle Krunkus
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| Posted: Thu Jun 25, 2009 1:26 am Post subject:
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Just a quick question about the conditionals.
What's the alternative for "if p then q"?
ie if not p then what? Not q?, 0?, or is it undefined?
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sizone
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| Posted: Thu Jun 25, 2009 2:58 am Post subject:
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Really good question. In fact, that's the area of formal logic that even screwed up my really good students. This is going to require a fairly abstract explanation so bare with me.
Conditional statements in formal logic -aren't- casual. We say "if...then..." because that's the only we have in language of expressing the proposition. Really, the results are apriori assured by the form of the proposition and the truth value of the inputs. You'll notice there aren't any conditional "statements" in the circuit, the conditionals are really material implication gates (they're logically equivalent).
if p then q, or formally p ->q and q -> p
in the circuit it's represented as ~p or q and ~q or p
Short answer to your question now before I trudge on:
A conditional is just a truth function operation, or a gate like all the rest. It will return a false, or low -only- when you have a true (high) antecedent and a false consequent. So on the first conditional gate you'll get a high signal unless you have a high signal on p and a low signal on q. The second gate will likewise return a high signal unless you have a high signal on q and a low signal on p.
Material equivalence, the biconditional gate will return high values only if both inputs are low or both inputs are high (the inverse of xor).
Back to the long windedness. Again, conditional statements, despite the fact that they are phrased "if..then.." are not casual. I don't think I've yet figured out a way to explain this so that it sinks in, but as electronic engineering folk are probably a little brighter and have a better understanding of math than the average California college freshaman I'll give it a shot.
Let's say you have a scale and 2 grams of (all right, I'll make the example harmless) cadmium sulfide.
You put the CS on the scale, the needle reads "2".
Gravity -caused- the CS to move the scale and it caused the needle to move to the marking "2", but nothing caused 2 to equal 2 and it's debatable how much "2" being equal to 2 is the result of cause and effect. That is, without there being something for the physical forces to be judged against there wouldn't be anything to ascribe a label to. In digital logic, there would be no reference for when something was high or low. 2=2 was true before the universe existed and will still be true should it ever some to an end. It is eternal, it is outside of time. As cause and effect require temporal separation they are not applicable to eternal things.
To get back to your question, the form of p -> q is eternal, as is nand and and and or and all the rest of the operators. In a sensible world the truth values they return given a set of inputs will always be the same. They can be easily instantiated in circuitry or thought.
An example of the gate in the form of a proposition would be something like "If a country looses its manufacturing industry then its middle class will suffer." A country loosing its industry physically causes the countries middle class to suffer, but that isn't what "causes" the proposition to be true or false. What it represents is entailment, which is hard to find outside of math and logic. It represents a constant link between one thing and another, not a causal relation between the two ("if it is a leopard, then it has spots" bad example, "if it has a heart then it has kidneys", that sort of thing).
So it may seem strange that there are conditionals (if..then..) and biconditionals (...if and only if.....) but this is explained by the difference between necessity and sufficiency which I'm not gonna go through right now....
To recap (duh, and I just remembered you can scroll down in Window's character map)
Truth table for the conditional (assume p is antecedent and q is consequent)
p.....q.....->
t......t......t
t......f......f
f......t......t
f......f......t
and for the biconditional (triple bar, ≡)
p.....q.....≡
t......t......t
t......f......f
f......t......f
f......f......t
Finally, this is going to sound snide, but it isn't meant to be: There is no undefined in bivalent (two value, digital) logic. A proposition is either true or false (value is either high or low). There are no inbetweens and there is nowhere to hide. |
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Uncle Krunkus
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| Posted: Thu Jun 25, 2009 4:34 am Post subject:
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| sizone wrote: | | Finally, this is going to sound snide, but it isn't meant to be: There is no undefined in bivalent (two value, digital) logic. A proposition is either true or false (value is either high or low). There are no inbetweens and there is nowhere to hide. |
I realised this would be the case as long as you're talking in purely theoretical terms, but I always tend to start with the physical reality and go back towards theory. Therefore, I was wondering whether, the circuit, if built, would actually output a definite value, or if it may depend on other factors, timing conditions etc. as sometimes happens in actual circuits.
BTW, thanks for the thorough answer. Very interesting reading.
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Uncle Krunkus
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| Posted: Thu Jun 25, 2009 4:56 am Post subject:
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Looking at it again, I also note that in the biconditional example it is valid to say, If not p then not q. When I said "undefined" I kind of meant that it could be determined as the classic "if... then..." statement would normally produce a result.
The first (conditional) example is kind of what I meant by "undefined" as in the result can't be properly expressed in the standard "If...Then..." form.
It basically goes something like "If not p then the output is high regardless of q" (which is less causal) or "if not p then not not p" (which sounds more causal)
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sizone
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| Posted: Thu Jun 25, 2009 5:18 pm Post subject:
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| Uncle Krunkus wrote: | | sizone wrote: | | Finally, this is going to sound snide, but it isn't meant to be: There is no undefined in bivalent (two value, digital) logic. A proposition is either true or false (value is either high or low). There are no inbetweens and there is nowhere to hide. |
I realized this would be the case as long as you're talking in purely theoretical terms, but I always tend to start with the physical reality and go back towards theory. Therefore, I was wondering whether, the circuit, if built, would actually output a definite value, or if it may depend on other factors, timing conditions etc. as sometimes happens in actual circuits.
BTW, thanks for the thorough answer. Very interesting reading. |
I majored in philosophy, so the theoretical tends to come first for me.
As I penned that last line is pretty much when it occurred to me that there would be brief indeterminate periods while transitioning through values. Deciphering datasheets isn't second nature to me yet, but looking at the one for the 4071, the transition times and propagation delays are all between 10 and 120 nanoseconds, which comes out to a max of an incredibly small fraction of a millisecond. Anything less than +/- 20 ms is going to be inaudible, I don't really know how much the delay would effect the circuit in terms of it's ability to calculate truth values. I don't know how the delays accumulate and I don't know how sensitive gates further down the chain are to periods of indeterminacy in earlier gates (if, for example, the total delay time between a change in input and a change in output is just the sum of the delays of all the gates involved, then the total delay time will still be extremely small. If it's the case that the delays are both cumulative and in some way amplificative or exponentially increasing then the total delay time could easily exceed the threshold for useability.) That being said, this is pretty much what logic function ics are designed for and meant to be doing, getting strung together to form more complex propositions. If you just set it up as a logic tester (say, some leds on the various outputs and the inputs replaced with switches on a stable cv supply) I'd imagine it would function more-or-less exactly as designed. You push the switches and the corresponding truth values for the operations either light up or fail to light up. When you start using it in music application, I'm not sure how well the "ideal" functioning will hold (though after my next trip to the parts store, we'll find out), unbuffered ac signals as input may terminally confuse it, fast switching times on the inputs may confuse it, ect.
Hey, you're the stripboard guy, right? If you really want a ship-in-a-bottle project you could build this just using transistors. which would be kind of neat as I suspect the imperfections in calculation are part of what makes lunettas sonically intersting and doing this with discreet components, you could tailor all the delay times.
Second post:
Again, the function of the gates is static. If you have a false input for p on the biconditional gate, it could still return a value of true if q is also false. The truth value of the terms (inputs) -doesn't- affect the truth value of the other terms. The truth value returned by the operator under examination is wholly determined by the values of the inputs and what kind of operation it is. The gate isn't waiting for input, it's a preset definition of the relations the terms being entered into the gate can come into. This is the point where theory and practice need to be divorced. Take a conditional gate. Assume the chip is getting power and that none of its inputs are tied to any signals. It's still returning a high value for the conditional relation (if p then q. No p, no q, no problem). When you input a high value now for the antecedent the gates output goes to low (if p then q. P, no q, problem). Physical processes cause the physical instantiation of the gate to produce a different output but at the abstract level the operation is still the same, only the inputs have changed.
If you want a genuinely causal operator you're going to need an analog system (not discreet) and it's going to be probalistic. Hydraulic computers like what control automatic transmissions in cars are probably a good model. There the output state really is going to be dependent on the inputs (each output state will be unique depending on the -exact- value of the inputs and their somewhat incalculable interactions, you won't know the output state apriori just by looking at the inputs).
Finally, this is also going to sound snide, sorry.
1: You can't make any valid inferences regarding a biconditional statement without knowing the truth value of both its terms (it's basically an assertion that p and q, if not exactly identical, never occur without each other. Quick example, "man is happy if and only if beer is present" this sounds confusing, but let's go through the iterations. First, man is happy, beer is present, both terms are true, the proposition holds and you get true on the output. )Second, man is not happy, beer is present. The proposition asserts that if beer is present, man is happy, man is not happy, the proposition doesn't hold and you get false for an output. Third, man is happy, beer is not present, same as the last example. Fourth, man is not happy, beer is not present. The assertion is that if you find a happy man, you will also have found beer. You found an unhappy man and you found no beer, the proposition is confirmed and you get an output of true. The point being that unless you know the truth value of both terms you can't draw inferences from a biconditional (I'll clarify this). If you know man is happy, but you don't know whether there's beer, you don't know if the proposition is true or false. The ideal again, if you're using a biconditional operator its just assumed that you know the truth values of both the terms because otherwise the operator isn't applicable. Note: running a quick truth table I see your concern, I'll go back over this at the end.
For simple conditionals, you almost got the right inference you just flipped the antecedent and consequent.
If p then q
not q
ergo not p
Which is an example of modus tollens
If p then q
not p
ergo not q
is an example of denying the antecedent, which is not a valid inference (again, this is a matter of necessity and not cause which makes this seem counter intuitive.)
As an example, "If I eat a sandwich, I will not be hungry"
"I didn't eat a sandwich and I'm hungry" sounds like a kosher inference, but really what you'd know with certainty given the proposition would be:
"I'm hungry, therefore I didn't eat a sandwich."
The reason you can't draw an inference from denying the antecedent is
"If I eat a sandwich, I will not be hungry"
"I didn't eat a sandwich"
It could be the case that you had a bowl of pasta instead and that you are most definitely not hungry. However
"If I eat a sandwich, I will not be hungry"
"I'm hungry"
We -know- you didn't eat that sandwich.
Going back to the biconditional.
If p is denied then q is denied.
Biconditional
1: (..p..->q..) & (..q..->..p)
2: ~p
3: (..q..->..p) (by simplification and associativity)
4: (..p..->q..) (by simplification)
5: ~q (by lines 2 and 3, modus tollens)
This is going to sound like a cop-out, you're right that you can infer ~q from the biconditional and ~p but that isn't the same as what the biconditional operator should return just given a low value for p. Drawing inferences and testing against truth tables are two different processes. Also, you can break the original proposition apart in this case (lines 3 and 4) but I don't think you can't glue it back together so that it will return a low value for q every time you have a low value for p. To "rebuild" the biconditional, you would need p and q, not negated on lines by themselves and you don't get them from the inference.
This might be a little more clear if we look at the operation as it's laid out in the circuit with the biconditional presented as a pair of conjoined disjunctions in which case you get
1: (~p or q) & (~q or p)
2: ~p
and the inferential chain just stops here. You would need p (not ~p) to get q by a disjunctive syllogism. So let's assume you have p instead
1: (~p or q) & (~q or p)
2: p
3: q (by lines 1 and 2, disjunctive syllogism)
Now we have the same problem, you can't rebuild the original operation without introducing (basically arbitrarily) additional terms. You can draw the inference, but the inference is a different thing than the state of the operator. At least I think it is.
Kind of still reading and rereading your second post. When I'm fresh I'll go over sufficiency and necessity (which should explain, as you were saying, how conditional operators seem more "causally" determined than biconditionals.) |
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blue hell
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| Posted: Thu Jun 25, 2009 5:52 pm Post subject:
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BTW, the reasoning as you gave it for the propagation and setup delays for logic ports is the reason to make clocked systems; time is made discrete (and the system is made slower) , but for even larger scale circuits the delays on the clock signals can become a problem too ... anyway the problem comes from combining digital signals flowing along routes with different delays. (turning paradoxes into oscillators, I think?)
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also .. could someone please turn down the thermostat a bit.
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sizone
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sizone
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| Posted: Wed Jul 01, 2009 11:16 pm Post subject:
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I had some mixed success building the transistor circuit. The inverters and or gates work as they should, but I can't get the and gate to work right. It should also be noted that the inverter section (I think) draws too much current to be useable. That is, I could get an inverted signal out of them, but if I tapped the inverted out and the output straight from the switch, it wouldn't work. So I wired up a pair of lm358 opamps to provide inverted inputs and to multiplex the input signal.
So the signal chain, as it were, is two single pole n/o switches going from Vdd to the inverting inputs on the opamps (and a handful of resistors and leads going to ground). the inverted and non-inverted outputs of the opamps are then going to their respective bases on the or gates. The output of the or gates is then going through a pair of leds and back to ground. And, by golly, that part so far works, btw, I had to use diodes on the transistor inputs, pretty sure I also had to intentionally miswire them (cathode's going to base), to get it to work. So the leds stay lit unless you have a false antecedent (~~p (p) for the first gate and ~~q (q) for the second) and a true consequent. Admittedly not much to get excited over, but it brought a smile to my face when it finally worked right. I'm going to read over Forest Mimm's digital logic book (where the transistor gates were lifted from) and see if I can't get the and gate to work right. If anyone actually wants to build this, let me know and I'll spend a few minutes sketching up the opamp connections and whatnot. Also, now that, at least, most of it's working I guess I could feed it some clock signals and see how it'll respond under more real-world applications.
Not totally uninteresting. Here's a sample of two low-audio frequency squarewaves (courtesy of synthmonger's 40106 osc) being used for the two inputs. Output is stereo (one channel for each gate). How much of the resultant sound is due to the gates, how much is due to the opamps and how much is due to my inability to design circuits is unknown.
http://electro-music.com/forum/phpbb-files/conditionalsquare_139.mp3
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sizone
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| Posted: Thu Jul 16, 2009 7:21 pm Post subject:
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Finally made a trip out to the store, picked up a few cmos and and or chips. Tried the circuit, it works as drawn as best as I can tell. Faster (more stable) inverters would be nice. I'm going to work in the opamp input splitter I was using for the transistor version and then put this on a board. Here are two quick samples, the first is using a slow pulse and a low audio frequency source as inputs, every output is tapped one by one. The second is two audio frequency signals, me changing their pitch, the material equivalence and (I think) disjunction are being tapped.
What I've noticed so far is that conditional gates (material implication on the transistor version, equivalence and implication on the cmos) do interesting harmonizing when the input signals are of similar pitch (the window seems to be pretty wide, up to a few octaves).
On a sad note, while the cmos version does pretty well with cv signals, I haven't had much luck getting it to work with switches and leds (the inverter in particular doesn't seem like it can handle the current swings and I haven't had the patience yet to try manipulating the inputs into cooperation). So it works pretty well as an audio circuit, but not so great as a truth function calculator (which is kind of what I wanted it for, oh well).
http://electro-music.com/forum/phpbb-files/allouts_121.mp3
http://electro-music.com/forum/phpbb-files/matequivdis_530.mp3
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blue hell
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| Posted: Sat Jul 18, 2009 8:52 am Post subject:
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The schematic is not too readable for me, but some of the recorded noises turned out to be pretty listenable 
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also .. could someone please turn down the thermostat a bit.
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sizone
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| Posted: Sat Jul 18, 2009 6:02 pm Post subject:
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That's what I get for using mspaint to draw up my schematics with. I've got a bunch more samples up on Rykhard's forum (more lenient upload restrictions) if you're curious.
Ummm.... let's see. Layout in words:
Two inputs: I1, I2
Inverted inputs ~I1, ~I2
Connections on the OR gate:
first set
Inputs=~I1, I2
Output= MI1
second set
Inputs=~I2, I1
Output=MI2
third set
Inputs I1, I2
Output=OR
Connections on the AND gate:
first set
Inputs= MI1, MI2
Output= ME
second set
Inputs= I1, I2
Output= AND
Remaining connections on the inverter
1
In=OR
Out=NOR
2
In=AND
out=NAND
3
In=ME
out=XOR
Construction/use notes so far: If you add additional signals to the inputs on the and and or gates, it alters the sound further. The inverter is the weak link in the chain. I'm still trying to improve that section, but any improvements are going to come at the cost of simplicity.
Now that's I've built it and have been able to listen to it I can speculate a little bit better on how it's working.
The and and or gates pass the signals on their inputs to their outputs when the appropriate conditions apply (at least one in present for or, both for and) and really crudely mix the signals. Again, being a humanities major, I did not know this, I wasn't exactly not expecting this to be the case but I considered it more likely that the output would be totally quantized (that the signal on the input wouldn't be passed to the output, that it would simply serve to open the gate as it were).
The mystery for me is now what happens when gates open but there's no signal present, eg. the material equivalence gate will open when both inputs are absent . Skipping a few steps to simplify, no input means the inverted inputs will both be high (between my multimeter and my leds, the inverter is putting out a steady current a little below the supply voltage), through the OR gates and to the AND gate this gives two high inputs of roughly supply voltage. The material equivalence output under these conditions is, not surprisingly, a steady current around supply levels. The mystery lies in how this signal affects the rest of the audio. |
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blue hell
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| Posted: Sat Jul 18, 2009 7:46 pm Post subject:
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| sizone wrote: | | I've got a bunch more samples up on Rykhard's forum (more lenient upload restrictions) if you're curious. |
Anything we could fix?
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also .. could someone please turn down the thermostat a bit.
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sizone
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| Posted: Sat Jul 18, 2009 8:26 pm Post subject:
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| Blue Hell wrote: | | sizone wrote: | | I've got a bunch more samples up on Rykhard's forum (more lenient upload restrictions) if you're curious. |
Anything we could fix? |
Not really. For one thing I can't even find the upload quota on my profile now, so the limit may have just been a new-user thing. Also, given the nature of this board, smaller more concise samples (that just demonstrate the circuit) seem to be more appropriate. This just seems a better place for technical information than really long demos. Also longer demos (at least when I do them) tend to utilize a lot more stuff than just the circuit that's meant to be demonstrated, so I think they may tend to be, dunno how to put this, uncentered? distracting?
Anway, that's it for my arm-chair modding. |
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sizone
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| Posted: Sun Jul 19, 2009 12:41 am Post subject:
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Cleaned up the circuit a little today by replacing the connections between the ins and outs with diodes. Also started to add decoupling caps to both the logic circuit and my clock sources. And then I ran out of .01 uf caps.
The circuit's a lot more stable now that the signals have some buffering. I noticed something pretty neat as a result (something so blaringly obvious I'm ashamed it didn't occur to me earlier): synthmonger's 40106 vco generates an extremely narrow pulse so when it's run through the inverter, duh, the duty cycle becomes something like 80 or 90 %. Which, I think, explains a lot of the sound I've been getting out of the thing. Now I'm kind of tempted to throw together a really simple square wave generator, or something with an adjustable pw. The 7555 oscillators I'm using have a variable pw, but no frequency control (and they're nowhere near audio range). The 4069 handles stuff in the lfo range o.k. but, at least with the narrow pulse, if the oscillator is around =>700hz the inverter never "sees" it as being off. It's still outputting -something- but I'm not quite sure what. Whatever it's putting out seems to be interfering with the functioning of the OR gates in a weird way, causing the output to mute regardless of the other input. Only explanation I can think of is phase cancellation, but that can't be it because a phase inverted audio signal is still an audio signal and I can't really hear this.... going to have to wait until tomorrow before I think about it.
It will be a long time before I can put together a real patch panel, I decided to make the most out of the breadboard patching scheme. I soldered diodes to the outs of all my oscillators, which makes sticking leads into the breadboard matrix a lot easier. Better still, signals with similar amplitude now passively mix if they're stuck in the same terminal. Signals with dissimilar amplitudes gate each other. Without attenuation the 555 output is much higher than the 40106, so cludging the the two together results in a kinda nice gated signal. I'm going to play around some with mixing and matching signals and destinations I'll put up the results if I get anything good. In the meantime, here's a second try at going through the outputs. Again, I'm having some trouble with higher frequencies right now so this is mostly in the rumbly range.
First snippet is the pair of inputs (and their respective inversions).
Second is the 4071 outputs, material implication 1, OR, material implication 2 (the weird effect of the inverter can be heard here, compare the amplitude of the first and third samples)
Last is the 4081. AND followed by material implication followed by me changing the pitch of the inputs.
http://electro-music.com/forum/phpbb-files/ins_620.mp3
http://electro-music.com/forum/phpbb-files/orgates_194.mp3
http://electro-music.com/forum/phpbb-files/andgate_566.mp3
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andgate.mp3 |
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sizone
Joined: Jun 09, 2009
Posts: 132
Location: Honolulu HI
Audio files: 48
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blue hell
Site Admin
Joined: Apr 03, 2004
Posts: 24569
Location: The Netherlands, Enschede
Audio files: 306
G2 patch files: 320
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| Posted: Sun Jul 19, 2009 4:56 am Post subject:
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| sizone wrote: | | For one thing I can't even find the upload quota on my profile now |
Click the profile button below any of your posts for inspection, and when you run out of quota please tell me, so I can up it.
_________________
Jan
also .. could someone please turn down the thermostat a bit.
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sizone
Joined: Jun 09, 2009
Posts: 132
Location: Honolulu HI
Audio files: 48
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| Posted: Sun Jul 19, 2009 10:55 pm Post subject:
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Thanks, will do. So I was paranoid about the upload cap for a reason. 20mb is a bit strict, but I can see it as an ideal limit to detour people from using the archive as a cache for warez and pr0n.
Regarding the circuit: Spent all afternoon fiddling with the inverter stage. Performed last rites for the 4071 callously fried by indifferent current swings. Vowed to avenge it's murder by picking up a 4049 in the near future and trying it out in place of the 4069. |
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blue hell
Site Admin
Joined: Apr 03, 2004
Posts: 24569
Location: The Netherlands, Enschede
Audio files: 306
G2 patch files: 320
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| Posted: Mon Jul 20, 2009 7:02 am Post subject:
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| sizone wrote: | | Another quick sample. |
Had not listened before, but this is a nice one!
(And yup that's what the 20 MB limit is for.)
_________________
Jan
also .. could someone please turn down the thermostat a bit.
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sizone
Joined: Jun 09, 2009
Posts: 132
Location: Honolulu HI
Audio files: 48
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sizone
Joined: Jun 09, 2009
Posts: 132
Location: Honolulu HI
Audio files: 48
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droffset
Joined: Feb 02, 2009
Posts: 515
Location: London area
Audio files: 2
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| Posted: Wed Aug 05, 2009 7:29 pm Post subject:
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| These are great! |
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sizone
Joined: Jun 09, 2009
Posts: 132
Location: Honolulu HI
Audio files: 48
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| Posted: Wed Aug 05, 2009 7:45 pm Post subject:
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| Offset: You know he next time I scavenge an old microprocessor I'm mailing it to you. |
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droffset
Joined: Feb 02, 2009
Posts: 515
Location: London area
Audio files: 2
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| Posted: Wed Aug 05, 2009 7:52 pm Post subject:
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Awesome 
Speaking of microprocessors I'm dissecting an old music keyboard that uses a CMOS microprocessor, a Yamaha sound chip, and a 4069. I'll look in this thread for ideas when I'm ready to give it "The Treatment." |
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sizone
Joined: Jun 09, 2009
Posts: 132
Location: Honolulu HI
Audio files: 48
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| Posted: Thu Nov 19, 2009 11:59 pm Post subject:
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I just built one of these configured as a simple truth function for a friend of mine. Not the best photos, but this is what it looks like on a protoboard with tow switches for inputs and an led tied to each output.
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