Q-Noise rejection?

[betty182]

hi

can any one help me understand the limitation of Q-noise rejection that can be achieved by increasing the number of bits in an A-D converter.

any help would be very appreciated

Betty

[mosc]

Not exactly sure what you are getting at. Q noise can mean several things. It is often a type of noise associated with bipolar transistors but it can also mean quantization noise. Since you are talking about AD converters, I assume the latter is what you are concerned with.

In any AD converter, there is always some quantization noise. This comes from the statistical inaccuracy of of the circuit that is trying to detect if the input is above or below a very small level. This is usually in the order of the least significant bit (LSB) . Imagine an 8 bit converter. Assume the voltage input range is 0 to 1 volt. Since there are only 256 numbers, the LSB will be a step of 1/256 volts. Thus, with a constant DC signal input, one might expect a random error signal of about 1/256 volt. This is an over simplification, but this is what you can think of as quantization noise. If you used a 10 bit converter instead, then the LSB would represent about 1/1024 of the max signal, or about 4 times less quantization noise.

So, for every additional bit you reduce the quantization noise by approximately one half. It isn't really that simple because there are many other sources of noise in AD converters, but this is close enough for most purposes.

[betty182]

Thats a great start thank you

but what is the nature of the frequency spread of Q noise?

and are there any problems when there is low levels of noise?

betty

[mosc]

Unless you know the intricate details of the circuit design, it is safe to assume that the quantization noise is flat - like white noise. In real life, it never is though.

As for problems with low levels of noise, I don't understand the question. Low levels of noise are what is generally desired.